Electric vehicle traction motor control

ABSTRACT

An electric vehicle traction motor control circuit includes a main thyristor in series with the motor armature between two supply rails. A second thyristor is connected in series with a commutating capacitor across the main thyristor which it can turn off by diverting the motor current briefly into the commutating capacitor. A third thyristor is connected in series with an inductor across the commutating capacitor and serves when fired, to reverse the voltage residing on the commutating capacitor following commutation. The second thyristor is connected to a pulse generator which is connected to be edge-triggered by the output of a comparator comparing actual motor current with upper and lower current limits set by a driver operable control. The comparator also brings an oscillator into operation which provides additional trigger inputs to the pulse generator if the latter fails to be edge-triggered by the comparator output.

This invention relates to an electric vehicle traction motor control ofthe general kind in which motor current is controlled by periodicallymaking or breaking a main current path to the motor when the motorcurrent falls below a lower limit or rises above an upper limitrespectively, the upper and lower limits being variable under thecontrol of the vehicle driver.

In one known arrangement the main current path is constituted by a mainthyristor connected in series with the motor between a pair of supplyrails. Once the main thyristor has been fired it will remain conductiveuntil the current flowing through it is reduced to substantially zero.This can be done by firing a second thyristor which is connected inseries with a commutating capacitor across the main thyristor. In orderto ensure that the maximum current can flow into the capacitor forcommutation, the voltage on the capacitor is reversed by firing a thirdthyristor in series with an inductor across the commutating capacitor.

With such a circuit arrangement difficulties can occur if a pulsegenerated to fire the second thyristor is accidentally suppressed or forsome other reason fails to fire the second thyristor. Such suppressionmay, for example, occur where a comparator circuit is used to comparethe actual motor current with the upper and lower limits and the edge ofan output pulse generated by the comparator circuit is used to trigger apulse generator for generating the firing pulse. Noise or other externalinterference could have the effect of "rounding" the edge so that thepulse generator is not triggered.

It is an object of the invention to provide an electric vehicle tractionmotor control circuit in which production of a firing pulse for thesecond thyristor is assured.

In accordance with the invention an electric vehicle traction motorcontrol circuit comprises a main thyristor connected in series with themotor between a pair of supply rails, a second thyristor connected inseries with a commutating capacitor across the main thyristor, a thirdthyristor connected in series with an inductor across the commutatingcapacitor, means for firing the main thyristor when the motor current isbelow a lower limit and for firing the second thyristor when the motorcurrent exceeds an upper limit, means including a driver operablecontrol device for determining said upper and lower limits, and meansfor firing the third thyristor, said means for firing the secondthyristor including an oscillator for producing a pulse train fortriggering a pulse generator.

The control circuit preferably includes a comparator which compares asignal corresponding to the actual motor current with the upper andlower limits, the output of the comparator being connected to the pulsegenerator and to a control terminal of the oscillator whereby the pulsegenerator may be triggered into producing a thyristor firing pulseeither by an edge of the output signal from the comparator or by an edgeof a pulse of the pulse train from the oscillator.

The oscillator may be arranged to be inhibited by the first pulseproduced by the pulse generator.

An example of the invention is shown in the accompanying drawings inwhich:

FIG. 1 is a circuit diagram of a thyristor chopper and motor circuit;

FIG. 2 is a circuit diagram of a commutating capacitor voltage sensingcircuit;

FIG. 3 is a circuit diagram of a current comparator circuit and thefiring circuit for one of the thyristors of the chopper circuit of FIG.1;

FIGS. 4 and 5 are circuit diagrams of firing circuits for the two otherthyristors of FIG. 1 respectively; and

FIGS. 6 and 7 are circuit diagrams of other logic circuit elementsincluded in the control circuit.

Referring firstly to FIG. 1 the motor in this case has an amaturewinding 10 and a field winding 11. A contact F connects one side of thearmature winding 10 to a positive supply rail 12 (at about 200 Vrelative to a rail 13) and a contact R connects the other side of thearmature 10 to the rail 12. The two sides of the armature 10 are alsoconnected to two fixed contacts of a change-over switch F/RB, the commoncontact of which is connected via an inductor 14 the field winding 11, amain thyristor SCR1 and a main fuse 15 in series to the rail 13. Foourdiodes D₁ to D₄ connect the two sides of the armature 10 to the rails12, 13, with the diode D₁ having its anode connected to the same side ofthe armature as the contact F and its cathode connected to the rail 12,the diode D₂ having its cathode connected to the anode of the diode D₁and its anode connected to the rail 13, the diode D₃ having its anodeconnected to the other side of the armature 10 and its cathode connectedto the rail 12 and the diode D₄ having its cathode connected to theanode of the diode D₃ and its anode connected by a brake current fuse 16to the rail 13. A further diode D₅ has its anode connected to the anodeof the thyristor SCR1 and its cathode connected to the rail 12. A sixthdiode D₆ has its cathode connected to the common contact of the switchF/RB and its anode connected to the rail 13.

For commutating the current through the thyristor SCR1 there is a secondthyristor SCR2 connected in series with a saturable core inductor 17, afuse 18 and a commutating capacitor 19 between the anode of thethyristor SCR1 and the rail 13. A third thyristor SCR3 is connected inseries with an inductor 20 across the capacitor 19.

For normal forward motoring the contact F is closed and the switch F/RBis closed to the right by contactors driven by circuits which do notform part of the present invention and an understanding of which is notnecessary for an understanding of the present invention. When the mainthyristor is conductive current flows through contact F, "forwardly"through the armature through the switch F/RB, the inductor 14, the fieldwinding 11, the thyristor SCR1 and the main fuse 15. When the thyristorSCR2 is fired (assuming that there is a negative voltage on the "upper"plate of the capacitor 19 at this stage), the current referred to isdiverted from the main thyristor SCR1 into the capacitor 19 via theinductor 17. This causes the thyristor SCR1 to turn off. The divertedcurrent causes the capacitor 19 to charge up until the voltage on theupper plate of the capacitor 19 is the same as that at the anode of thethyristor SCR1. At this stage the inductor 17 continues to cause currentto flow into the capacitor 19 and the inductor 14 acts to maintaincurrent in the armature and field windings via the "freewheel" diode D₅.Inductor 17 and capacitor 19 act as a resonant circuit but when thevoltage on capacitor 19 reaches its peak, (i.e. when the current in theinductor 17 falls to zero) the thyristor SCR2 turns off and the chargeis then held on the capacitor 19. The armature and field winding currentdecays away.

Firing of the thyristor SCR3 causes the inductor 20 to be connectedacross the charged capacitor 19. The capacitor 19 thus discharges intothe inductor 20, current continuing to flow until a peak negativevoltage is attained, which peak is held until the next commutation isrequired.

For reverse running contact F is opened, contact R is closed and switchF/RB is closed to the left. For regenerative braking when the motor isrunning forwardly both contacts F and R are opened and switch F/RB isclosed to the left. Current induced in the armature, then flows throughthe switch F/RB, the inductor 14, the field winding 11, the thyristorSCR1, the fuses 15 and 16 and the diode D₄.

FIG. 1 also shows an armature current sensing arrangement comprising aferromagnetic loop 21 surrounding one of the conductors leading to thearmature winding 10, a Hall effect device 22 in a gap in this loop and adifferential amplifier A₁ with its inputs connected by resistor R₁ andR₂ to the terminals of the device 22. A feedback resistor R₃ connectsthe inverting input terminal of the amplifier A₁ to its output terminaland a bias resistor R₄ connects the non-inverting terminal to earth. Aresistor and thermistor network 23 is provided at the output of theamplifier A₁ to provide temperature compensation.

A circuit is also provided to detect the instant at which the voltage onthe inductor 17 reverses and the diode D₅ starts to conduct duringcommutation. In the example shown this circuit includes a diode D₇, aresistor R₅ and the light emitting diode of an opto-coupler O₁ connectedin series across the inductor 17. The transistor of the opto-coupler isincluded in a "ready" circuit (not shown in detail) which produces anoutput pulse at a terminal 24 for as long as there is a reversed voltageon the inductor 17. The "ready" pulse may alternatively be generated bymeans of a current detector on the conductor associated with thefreewheel diode D₅. Such detector may be a current transformer oranother Hall effect type detector, the latter being preferred.

Turning now to FIG. 2 there is shown a circuit which is used to monitorthe voltage on the capacitor 19 after firing of the thyristor SCR3. Thiscircuit includes a pnp transistor Q₁ which has its collector connectedto the rail 13 and its base connected by a high ohmic value resistor R₅to the capacitor 19. The emitter of the transistor Q₁, is connected viaa current limiting resistor R₆ and the light emitter diode of anopto-coupler O₂ to a rail 25. A resistor R₇ is connected between thebase of the transistor Q₁ and the rail 25 and a diode D₈ has its cathodeconnected to the rail 25 and its anode connected to the base oftransistor Q₁ to provide protection of the transistor Q₁ in the periodwhilst the capacitor voltage is positive following commutation. The rail25 has a zener diode regulated supply from the rail 12. To this end aresistor R₉ connects the rail 12 to the rail 25 and a zener diode ZD₁has its cathode connected to the rail 25 and its anode connected to therail 13, a smoothing capacitor C₁.

The photo-transistor of the opto-coupler O₂ has its collector connectedto a +15 V supply rail 26 associated with a ground rail 27 and a -15 Vsupply rail of a power supply which is isolated from the main tractionpower supply rails 12, 13. The emitter of this photo-transistor isconnected by a resistor R₁₀ to the rail 27 and a resistor R₁₁ connectsits base to its emitter. The photo-transistor of another opto-coupler O₃is likewise connected with resistors R₁₂ and and R₁₃. The emitters ofthese two transistors are also connected by resistors R₁₄ and R₁₅respectively to the inverting and non-inverting input terminals of anoperational amplifier A₁. A resistor R₁₆ connects the non-invertinginput terminal of the amplifier A₁ to the rail 27 and the outputterminal of the amplifier A₁ is connected to the cathode of a diode D₉with its anode connected to the base of an pnp transistor Q₂ with apotentiometer R₁₇ connecting the emitter of the transistor Q₂ to therail 27. The collector of the transistor Q₂ is connected via lightemitting diode of the opto-coupler O₃ to the rail 28. A resistor R₁₈connects the base of the transistor Q₂ to the rail 27. The emitter ofthe transistor Q₂ is connected by a resistor R₁₉ and a capacitor C₂ inparallel to the inverting input terminal of the amplifier A₁.

The circuit described provides a voltage across the potentiometer R₁₇which is substantially linearly related to the voltage across thecapacitor 19 (except when this latter voltage is positive followingcommutation). The use of the opto-isolator O₃ in the feedback loop ofthe amplifier A₁ provides compensation for the non-linearity andvariations of gain with temperature of the opto-isolator O₂, assumingthe two opto-isolators O₂ and O₃ to be reasonably matched.

The slider of the potentiometer R₁₇ is connected both to a sample andhold circuit based on operational amplifiers A₂ and A₃ and to athreshold voltage detector based on an operational amplifier A₄. Thesample and hold circuit includes an n-channel field effect transistor Q₃with its drain connected to the output terminal of the amplifier A₂ andits source connected to one side of a capacitor C₃ which has its otherside connected to the rail 27. The inverting input terminal of theamplifer A₂ is connected by a resistor R₁₉ to the slider of thepotentiometer R₁₇ and its non-inverting input terminal is connected by aresistor R₂₀ to the rail 27 and by a resistor R₂₁ to the rail 28. Afeedback resistor R₂₂ connects the output terminal of the amplifier A₂to the inverting input terminal thereof so that the amplifier A₂ acts asa linear inverting amplifier.

A bias resistor R₂₃ connects the output terminal of the amplifier A₂ tothe gate of the field effect transistor Q₃ which is also connected tothe anode of a diode D₁₀. The cathode of the diode D₁₀ is connected by aresistor R₂₄ to the collector of an npn transistor Q₄ which has itsemitter connected to the rail 28 and its collector connected by aresistor R₂₅ to the rail 26. The base of the transistor Q₄ is connectedto the common point of two resistors R₂₆, R₂₇ in series between thecollector of a pnp transistor Q₅ and the rail 28. The emitter of thetransistor is connected to the rail 26 and its biased off by a resistorR₂₈ connected between the rail 26 and the base of the transistor Q₄which is also connected by a resistor R₂₉ to a terminal 29 (see FIG. 7).

Whilst the terminal 29 is at a voltage close to that on the rail 26, thetransistor Q₄ and Q₅ are off and the field effect transistor Q₃ isnon-conductive. When the voltage on the terminal 29 falls as will beexplained hereinafter, the transistor Q₄ and Q₅ turn on and the fieldeffect transistor Q₃ assumes a low resistance state, allowing thecapacitor C₃ to charge or discharge rapidly to the voltage then existingat the output terminal of the amplifier A₂.

The amplifier A₃ is connected as a voltage follower to provide a veryhigh input impedance so as not to discharge the capacitor C₃. A resistorR₃₀ connects the capacitor C₃ to the non-inverting input terminal of theamplifier A₃, a resistor R₃₁ connecting the output terminal of theamplifier A₃ to its inverting input terminal. The output terminal of theamplifier A₃ is also connected to the cathode of a diode D₁₁, of whichis connected by a normally closed relay contact to a terminal 30 (FIG.3).

The amplifier A₄ is connected as a comparator with hysteresis. Itsinverting input terminal is connected by a resistor R₃₂ to the slider ofthe potentiometer R₁₇, and its non-inverting input terminal is connectedto the common point of a pair of resistors R₃₃, R₃₄ in series betweenthe rails 27, 28 and also, by a resistor R₃₅, to its output terminalwhich is connected to a terminal 31.

Turning now to FIG. 3, there is shown schematically the arrangement inwhich the signals from the current transducer circuit of FIG. 1 and thecapacitor voltage circuit of FIG. 2 are used. The current signal isapplied via a resistor R₄₁ to the inverting input terminal of anoperational amplifier A₅ connected as a comparator with hysteresis. Therequired hysteresis is obtained by means of resistors R₄₂, R₄₃ connectedin series between the output terminal of the amplifier A₅ and the rail27 with their common point connected to the non-inverting input terminalof the amplifier A₅. The inverting input terminal of the amplifier A₅ isconnected by a resistor R₄₄ to a motor current demand signal generatingcircuit 32, of which the output stage is shown. It receives inputsignals from a speed transducer circuit 33 and from accelerator andbrake pedal operated potentiometers 34 and 35 and produces a d.c. outputsignal representative of the desired average motor current varying inaccordance with a complex function of speed and pedal depression.Details of a similar circuit arrangement may be found in prior U.K.Patent Application No. 8364/75.

The output stage is constituted by an operational amplifier A₁₀₀ whichoperates either in inverting or non-inverting mode according to whethera transistor Q₁₀₀ is on or not. The inverting input terminal of theamplifier A₁₀₀ is connected by a resistor R₁₅₀ to a point in the circuit32 and two resistors R₁₅₁, R₁₅₂ of the same value connect the same pointto the non-inverting input terminal. A resistor R₁₅₃ combined with acapacitor C₁₀₀ in series connect the output terminal of the amplifierA₁₀₀ to the earth rail 27. A resistor R₁₅₄ connects the junction of theresistor R₁₅₃ with the capacitor C₁₀₀ to the anode of a diode D₁₀₀, thecathode of which is connected to the base of a transistor Q₁₀₁ connectedas an emitter follower. Two resistors R₁₅₅, R₁₅₆ in series connect theemitter of the transistor Q₁₀₁ to the rail 27 with the junction of theseresistors connected to the inverting input terminal of the amplifierA₁₀₀ by a feedback resistor R₁₅₇. The emitter of the transistor Q₁₀₁ isconnected by the resistor R₄₄ to the inverting input terminal of theamplifier A₅.

The terminal 30 is connected to the base of the emitter followertransistor Q₁₀₁. If the output of the amplifier A₅ is high the voltageat its non-inverting input terminal is at a fixed positive level whichmust be exceeded by the voltage at its inverting input terminal beforethe amplifier output can go negative. Similarly when the output of theamplifier A₅ is low, there is a fixed negative voltage applied to thenon-inverting input terminal of the amplifier A₅. The signals appliedvia resistors R₄₁ and R₄₄ are of opposite polarity and these resistorsmay be regarded as forming a potential divider so that for a givendemand signal the output of the amplifier A₅ will go low when an uppercurrent limit is exceeded and will go high when the motor current isless than a low current limit, both limits being variable by the driverusing the pedals 34, 35.

The effect of the capacitor voltage signal applied via terminal 30 is todecrease the level to which the current demand signal may rise ifcapacitor voltage is too low.

The output terminal of the amplifier A₅ is connected by a diode D₁₂ anda resistive potential divider R₄₆, R₄₇ to the base of an npn transistorQ₆ with its emitter grounded to the rail 27 and its collector connectedby a resistor R₄₈ to the rail 26. The collector of the transistor Q₆ isconnected to a terminal 36 (FIG. 4) and also to the cathode of a diodeD₁₃ with its anode connected by a resistor R₄₉ to the rail 26. A diodeD₁₄ connects the anode of the diode D₁₃ to a terminal 37 (FIG. 7). Azener diode ZD₂ has its cathode connected to the anode of the diodes D₁₃and D₁₄ and its anode connected by a resistor R₅₀ to the rail 27. Theresistor R₄₉ and the zener diode ZD₂ are chosen so that the zener diodeZD₂ does not conduct if either of the diodes D₁₃, D₁₄ is conducted, i.e.if the transistor Q₆ is on or the terminal 39 voltage is low.

An npn transistor Q₇ has its emitter connected to the rail 27 and itsbase connected to the anode of the zener diode ZD₂, its collector beingconnected by a resistor R₅₁ to the rail 26. The transistor Q₇ turns onwhenever the zener diode ZD₂ is conducting.

The emitter of the transistor Q₇ is connected by a resistive potentialdivider R₅₂, R₅₃ to the base of an npn transistor Q₈ which controls anoscillator based on a unijunction transistor Q₉ and a capacitor C₄. Thesecondary base of the unijunction transistor Q₉ is connected by tworesistors R₅₄, R₅₅ in series to the rail 27 and its primary base isconnected by a resistor R₅₆ to the rail 26. There are two separatecharging paths for the capacitor C₄ which determine the frequency of theoscillator. One such path is constituted by a resistor R₅₇ connected inseries with the capacitor C₄ between the rails 26, 27. The other path isconstituted by a resistor R₅₈, a diode D₁₅, a diode D₁₆ and a resistorR₅₉ in series across the resistor R₅₇, the total resistance of theresistors R₅₈, R₅₉ being significantly less than the resistance of theresistor R₅₇. A diode D₁₇ is connected across the series combination ofthe resistor R₅₉ and the diode D₁₆, with its polarity reversed relativeto that of the diode D₁₆. The anode of the diode D₁₆ and the cathode ofthe diode D₁₇ are connected to the collector of the transistor Q₈. Theanode of the diode D₁₅ is connected to the anode of a diode D₁₈, thecathode of which is connected to the anode of a thyristor SCR4 which hasits cathode connected to the rail 27.

When the transistor Q₈ is conducting, the oscillator does not operatesince the capacitor C₄ is held discharged. When the transistor Q₈ isturned off, i.e. when the transistor Q₇ turns on, the oscillator startsto run at a relatively high frequency until the thyristor SCR4 is firedas will be explained hereinafter. Thereafter, for as long as thetransistor Q₈ is off, the oscillator will operate at a low frequencydetermined by the resistor R₅₇.

The common point of the resistors R₅₄, R₅₅ is connected to the base of atransistor Q₁₀ which has its emitter connected to the rail 27 and itscollector connected by a resistor R₆₀ to the rail 26. The collector ofthe transistor Q₁₀ is connected to the TRIGGER terminal of an integratedcircuit timer T₁ (shown as one half of a dual timer circuit type NE556manufactured by signetics). The DISCHARGE and THRESHOLD terminals ofthis timer circuit are connected to the junction of a resistor R₆₁ and acapacitor C₅ in series between the rails 26 and 27. The CONTROL VOLTAGEterminal of the circuit is connected to the rail 27 by a capacitor C₆and the RESET terminal is connected to the collector of an npntransistor Q₁₁ which has its emitter connected to the rail 27 and itscollector connected by a resistor R₆₂ to the rail 26. The base of thetransistor Q₁₁ is connected by a resistor R₆₃ to the rail 27 and by aresistor R₆₄ to the cathode of a diode D₁₉ having its anode connected tothe collector of the transistor Q₇. The base of the transistor Q₁₁ isalso connected by a resistor R₆₅ to the cathode of a diode D₂₀, theanode of which is connected to a terminal 40.

The OUTPUT terminal of the timer circuit T₁ is connected to a terminal41 and thence to the gate of the main thyristor SCR1. This OUTPUTterminal is also connected by a normally closed override contact 42 anda resistor R₆₆ to gate of the thyristor SCR4, this gate being alsoconnected by a resistor R₆₇ to the rail.

Assuming the voltage at terminal 40 is low and that at terminal 89 ishigh turning off of the transistor Q₆ by a negative transition in theoutput of the output of the current comparator operational amplifier A₅causes transistor Q₇ to turn on which in turn causes the oscillator tocommence oscillating at relatively high frequency, and, because, inthese circumstances, the transistor Q₁₁ is turned off, the timer T₁ willbe triggered the resistors R₅₈ and R₅₉ and the capacitor C₄ fixing thedelay before such triggering at approximately 70 μS. The timer OUTPUTterminal now goes high for 20 μS, set by the resistor R₆₁ and thecapacitor C₅. This output pulse fires the thyristors SCR1 and SCR4, thelatter interrupting the previous charging path for the capacitor C₄. Theresistor R₅₇ and the capacitor C₄ set the repetition frequency of theoscillator at approximately 200 Hz so that additional firing pulses areproduced by the timer T₁ at this frequency, in case the current level inthe thyristor SCR1 is insufficient for it to hold the thyristor SCR1conductive when the output of the current comparator operationalamplifier A₅ goes high (indicating that the actual current has reachedthe upper limit), transistor Q₆ turns on, turning off transistor Q₇which turns on transistors Q₈ and Q₁₁. Transistor Q₁₁ holds the RESETterminal of the timer T₁ low so that it cannot be triggered andtransistor Q₈ maintains the capacitor C₄ discharged so that theoscillator ceases to run.

The terminals 36, 39 and 40 provide input signals to the circuit of FIG.4 which controls firing of the thyristor SCR2. A resistor R₇₀ connectsthe terminal 36 to the anode of a zener diode ZD3, the cathode of whichis connected by a resistor R₇₁ to the rails 26 so that the zener diodeZD3 only conducts when the transistor Q₆ of FIG. 3 is on (i.e. when thecurrent comparator operation amplifier A₅ output is high). The cathodeof the zener diode ZD3 is connected to the base of a pnp transistor Q₁₂,the emitter of which is connected to the rail 26 and the collector ofwhich is connected to the rail 27 by a resistor R₇₂. The collector ofthe transistor Q₁₂ is connected by a resistor R₇₃ and a capacitor C₆ inseries to the base of a npn transistor Q₁₃ which has its emitterconnected to the rail 27 and its collector connected by a resistor R₇₄to the rail 26. The base of the transistor Q₁₃ is connected to thecathode of a protective diode D₂₂ which has its anode grounded to rail27 and is also connected by a resistor R₇₅ to the rail 27 to bias thetransistor Q₁₃ off.

It will be appreciated that when the transistor Q₁₂ turns on thetransistor Q₁₃ will be turned on for as long as it takes the capacitorto charge up (the time constant R₇₃ C₆ being approximately 10 μS).

The collector of the transistor Q₁₂ is also connected by a resistor R₇₆and a diode D₂₃ in series to one side of a capacitor C₇, the other sideof which is connected to the rail 27. Said one side of said capacitor C₇is connected to the emitter of a unijunction transistor Q₁₄, which hasits secondary base connected by a resistor R₇₇ to the rail 27 and itsprimary base connected to the rail 26 by a resistor R₇₈. The secondarybase of the unijunction transistor Q₁₄ is also connected by a resistorR₇₉ and a diode D₂₄ in series to the base of the transistor Q₁₃.

The resistor R₇₆, capacitor C₇ and unijunction transistor Q₁₄ form anoscillator, operating under the control of the transistor Q₁₂ at afrequency of about 3 KHz. This oscillator is arranged to be inhibited byan npn transistor Q₁₅ with its collector emitter connected across thecapacitor C₇ and biased off by a resistor R₈₀ connected between its baseand the rail 27. The base of the transistor Q₁₅ is also connected to thecathode of a thyristor SCR5 the anode of which is connected by aresistor R₈₁ to the collector of the transistor Q₁₂. The base of thetransistor Q₁₅ is further connected to the collector of an npntransistor Q₁₆ having its emitter connected to the rail 27 and its baseconnected by a resistor R₈₂ to the rail 27. A diode D₂₄ has its cathodeconnected to the base of the transistor Q₁₆ and its anode connected by aresistor R₈₃ to the terminal 40. A diode D₂₅ connects the anode of thediode D₂₄ to the terminal 39 so that the transistor Q₁₆ can only turn onwhen the signals at both terminals 39 and 40 are high.

The thyristor SCR5 has its gate connected by a resistor R₈₄, a diode D₂₆and a normal closed override contact 43 to the OUTPUT terminal toanother integrated circuit timer T₂ (constituted by the other half ofthe NE556 circuit of time T₁). The INPUT terminal of the timer T₂ isconnected to the emitter of the transistor Q₁₃ and its CONTROL VOLTAGEterminal is connected by a capacitor C₈ to the rail 27. The THRESHOLDand DISCHARGE terminals of the timer T₂ are both connected by a resistorR₈₅ to the rail 26 and by a capacitor C₉ to the rail 27, the resistorR₈₅ and the capacitor C₉ setting the on-time of the monostablemultivibrator constituted by the timer T₂ and its associated componentsat about 20 μS. The OUTPUT terminal of the timer T₂ is also connected tothe gate of the second thyristor SCR2 (FIG. 1) and to a terminal 44.

The RESET terminal of the timer T₂ is connected by a resistor R₈₆ to therail 26 and by the collector-emitter path of an npn transistor Q₁₇ tothe rail 27. The base of the transistor Q₁₇ is connected by a resistorR₈₇ to the rail 27 and by a resistor R₈₈ to the anode of a zener diodeZD4 having its cathode connected to the cathode of three diodes D₂₆,D₂₇, and D₂₈ respectively. The anodes of the diodes D₂₆, D₂₇, and D₂₈are connected to three terminals 45, 46 and 47 see FIG. 5 respectively,so that a high voltage signal at any of these terminals will turn on thetransistor Q₁₇ and reset the timer T₂. A capacitor C₁₀ is connectedbetween the cathode of the zener diode ZD4 and the rail 27.

Provided that the signal voltages at the terminals 45, 46 and 47 are alllow when the transistor Q₁₂ is turned on by output of the currentcomparator operational amplifier A₅ going low, the timer T₂ will betriggered immediately and the oscillator around the unijunctiontransistor Q₁₄ starts to run providing further triggering pulses to thetimer T₂. The first output pulse from the timer T₂ turns on thethyristor SCR5 which, unless the transistor Q₁₆ is on, turns on thetransistor Q₁₅ on, thereby holding the capacitor C₇ discharged andstopping the oscillator from running.

A normally open contact 48 connects the terminal 36 via a resistor R₈₉and a diode D₂₉ to the emitter of the unijunction transistor Q₁₄, sothat when the contact 48 is closed (when a "creep" condition has beenselected) the oscillator runs at a significantly lower frequency of say400 Hz when the output of the current comparator operational amplifierA₅ is low. In this condition the transistor Q₁₂ is off so that firing ofthe thyristor SCR5 does not provide current to turn on the transistorQ₁₅ and stop the oscillator.

Turning now to FIG. 5 the OUTPUT terminal of the timer T₂ (FIG. 4) isconnected via the terminal 44 to through two resistors R₉₀, R₉₁ inseries to the rail 27. The common point of these resistors is connectedto the base of an npn transistor Q₁₈, the emitter of which is groundedto the rail 27. The collector of the transistor Q₁₈ is connected by aresistor R₉₂ to the rail 26 and is also connected to the TRIGGERterminal of another timer integrated circuit T₃ which is connected as amonostable multivibrator with a pulse duration of about 2.5 mS. TheTHRESHOLD and DISCHARGE terminals of the timer T₃ are the rail 27 by acapacitor C₁₁ and to the rail 26 by a resistor R₉₃ and variable resetR₉₄ in series. A capacitor C₁₂ connects the CONTROL VOLTAGE terminal ofthe timer T₃ to the rail 26 and the RESET terminal is connected to aterminal R₁. The OUTPUT terminal is connected to a terminal 49 (FIGS. 6and 7).

The output terminal of the timer T₃ is also connected via a capacitorC₁₃ to one end of a resistor R₉₅ the other end of which is connected tothe rail 26. A diode D₂₉ has its cathode connected to the rail 26 andits anode connected to the junction between the capacitor C₁₃ and theresistor R₉₅ so that a negative going pulse is produced at this junctionwhen the timer T₃ resets. This junction is also connected to the TRIGGERterminal of another timer T₄, again connected as a monostablemultivibrator with a pulse duration of about 20 μS. The THRESHOLD andDISCHARGE terminals of the timer T₄ are connected to the rail 26 by aresistor R₉₆ and to the rail 26 by a capacitor C₁₄. A capacitor C₁₅connects the CONTROL VOLTAGE terminal of the timer T₄ to the rail 27 andits RESET terminal is connected to a terminal R₂. The output terminal ofthe timer T₄ is connected via the terminal 45 to the gate of thethyristor SCR₃ and also to the reset circuit of the timer T₂ (FIG. 4).

The OUTPUT terminal of the timer T₄ is also connected by two resistorsR₉₈, R₉₉ in series to the rail 27, the junction of these resistors beingconnected to the base of an npn transistor Q₁₉ which has its emitterconnected to the rail 27. The collector of the transistor Q₁₉ isconnected by a load resistor R₁₀₀ to the rail 26 and is also connectedto the TRIGGER terminal of yet another timer T₅ connected as amonostable multivibrator with a pulse duration of 300 μS. The THRESHOLDand DISCHARGE terminals of the timer T₅ are connected to the rail 27 bya capacitor C₁₆ and to the rail 26 by a resistor R₁₀₁ and a variableresistor R₁₀₂ in series. The CONTROL VOLTAGE terminal of the timer T₅ isconnected by a capacitor C₁₇ to the rail 27 and its RESET terminal isconnected directly to the rail 26.

A capacitor C₁₈ connects the OUTPUT terminal of the timer T₅, whichterminal is also connected to the terminal 46, to the TRIGGER terminalof a further timer circuit T₆ connected as a monostable multivibratorwith a pulse length of 100 μS. The THRESHOLD and DISCHARGE terminals ofthe timer T₆ are connected to the rail 27 by a capacitor C₁₉ and to therail 26 by a resistor R₁₀₃. The CONTROL VOLTAGE terminal of the timer T₆is connected by a capacitor C₂₀ to the rail 26 and its RESET terminal isconnected directly to the rail 26. The TRIGGER terminal is connected bya resistor R₁₀₄ and a diode D₃₀ to the rail 27 so as to convert thetrailing edge of the output pulse of the timer T₅ into a negative-goingtriggering inpulse for the timer T₆. The output terminal of the timer T₆is connected to the terminal 47.

Turning now to FIG. 6, there is shown a simple circuit which convertsthe low signal which exists at terminal 31 when the capacitor 19 voltageis too low into a high level signal for use in the circuits of FIGS. 3and 4. This circuit includes a resistor R₁₁₀ connecting the anode of adiode D₃₁ to the rail 26. The terminal 31 is connected to the anode ofthis diode by a normally closed contact which is energised if it isrequired to override the Vlow control signal. The cathode of the diodeD₃₁ is connected by a resistor R₁₁₁ to the base of an npn transistor Q₂₀which base is also connected by a resistor R₁₁₁ to the rail 27. Thetransistor Q₂₀ has its emitter connected to the rail 27 and itscollector connected to the terminal 40 and by a resistor R₁₁₃ to therail 26.

The R₂ reset signal for resetting the timer T₄ is generated by invertinga demand cutoff signal generated under certain circumstances duringchange overs between forward and reverse motoring and braking. Thisparticular feature is not essential to the present invention and thederivation of the demand cutoff signal will not be described herein. Thedemand cutoff terminal 50 is connected by a resistor R₁₁₄ to the base ofan npn transistor Q₂₁ which has its emitter connected to the rail 27. Aresistor R₁₁₅ connects the base of the transistor Q₂₁ to the rail 27 anda resistor R₁₁₆ connects the collector of the transistor Q₂₁ to the rail26, which collector is also connected to the terminal R₂ and to thecathode of a diode D₃₂. The anode of the diode D₃₂ is connected by acapacitor C to the rail 26 and also to the anodes of two diodes D₃₃, D₃₄and a zener diode ZD5. The cathode of the diode D₃₃ is connected toterminal 49 and that of the zener diode ZD5 is connected by tworesistors R₁₁₇ and R₁₁₈ in series to the rail 26. The junction of thisresistor is connected to the base of a pnp transistor Q₂₂ with itsemitter connected to the rail 26 and its collector connected by aresistor R₁₁₉ to the rail. The cathode of the diode D₃₄ is connected tothe collector of an npn transistor Q23 with its emitter grounded to rail27 and its collector connected by a resistor R₁₂₀ to the rail 27. Thebase of the transistor Q₂₃ is connected by a resistor R₁₂₁ to the rail27 and also to the anode of a zener diode ZD6 the cathode of which isconnected to the terminal 24 and, by a resistor R₁₂₂ to the rail 26.This transistor Q₂₂ can be turned on by a positive going signal at theterminal 24 or at the terminal 50 or a negative going signal at theterminal 49.

The collector of the transistor Q₂₂ is connected to the TRIGGER terminalof another timer circuit T₇ connected as a monostable multivibrator witha pulse duration of 100 μS. The THRESHOLD and DISCHARGE terminals of thetimer T₇ are connected by a capacitor C₂₂ to the rail 27 and by aresistor R₁₂₃ to the rail 26. The CONTROL VOLTAGE terminal is connectedby a capacitor C₂₃ to the rail 27 and the RESET terminal is connecteddirectly to the rail 26.

The OUTPUT terminal of the timer C₇ is coupled by a capacitor C₂₄ to theTRIGGER terminal of another timer T₈. This TRIGGER terminal is connectedto the rail 26 by a resistor R₁₂₄ and a diode D₃₅ in parallel so thatthe timer T₈ is triggered by the falling edge of the output pulse of thetimer T₇. The timer T₈ is connected as a monostable multivibrator with apulse duration of 50 μS. Its THRESHOLD and DISCHARGE terminals areconnected to the rail 27 by a capacitor C₂₅ and to the rail 26 by aresistor R₁₂₅. The CONTROL VOLTAGE terminal of the timer T₈ is connectedto the rail 27 by a capacitor C₂₆. The RESET terminal of the timer T₈ isconnected to the collector of an npn transistor Q₂₄ which has itsemitter grounded to rail 27 and its collector connected to the rail 26by a resistor R₁₂₆. The base of the transistor Q₂₄ is connected to thecollector of an npn transistor Q₂₅, the emitter of which is connected tothe rail 27 and the collector of which is connected by a resistor R₁₂₇to the rail 26. The base of the transistor Q₂₅ is connected to thejunction of two resistors R₁₂₈, R₁₂₉ connected in series between theOUTPUT terminal of the timer T₈ and the rail 27 and also connected by aresistor R₁₃₀ to the cathode of a diode D₃₆ with its anode connected tothe collector of the transistor Q₂₃.

The OUTPUT terminal of the timer T₈ is also connected by two resistorsR₁₃₁ and R₁₃₂ in series to the rail 27, with the junction of theseresistors connected to the base of an npn transistor Q₂₆. The emitter ofthe transistor Q₂₆ is connected to the rail 27 and its collector isconnected via a normally closed override contact 51 to the R₁ terminaland also by a resistor R₁₃₃, to the rail 26.

The timer T₇ is triggered when the transistor Q₂₂ turns off either as aresult of the signal at terminal 49 going high (caused by triggering oftimer T₃) or as a result of the signal at terminal 24 going low. At theend of the output pulse from the timer T₇, the timer T₈ is triggered,provided to signal at terminal 24 remains low. Once triggered the timerT₈ is not reset if the signal at terminal 24 goes high.

Turning finally to FIG. 7, two simple logic circuits are shown. Firstlythere is an npn transistor Q₂₇ controlling the signal at the terminal 29in accordance with the signals at the terminals 46 and 49. The emitterof the transistor Q₂₇ is connected to the rail 27 and its base isconnected to the same rail by a resistor R₁₃₅. This base is alsoconnected to the anode of a zener diode ZD7, the cathode of which isconnected by a resistor R₁₃₆ to the cathodes of two diodes D₃₇ and D₃₈,which have their anodes connected to the terminals 46 and 49respectively. A capacitor C₂₇ is connected between the cathodes of thesediodes and the rail 27. The collector of the transistor Q₂₇ is connectedto the terminal 29 and by a resistor R₁₃₇ to the rail 26. It will beappreciated that the signal at the terminal 29 goes high to cause thefield effect transistor Q₃ (FIG. 2) to become conductive, only when thesignals at terminals 46 and 49 are both low.

The remainder of FIG. 7 controls the signal at terminal 37 in accordancewith the signals at terminals 46, 47 and 49. An npn transistor Q₂₈ hasits emitter connected to the rail 27 and its base connected to the samerail by a resistor R₁₄₀. This base is also connected to the anode of azener diode ZD8, the cathode of which is connected by a resistor R₁₄₁ tothe cathodes of three diodes D₃₉, D₄₀ and D₄₁ with their anodesconnected to the terminals 46, 47 and 49 respectively. A capacitor C₂₈is connected between the cathodes of these diodes and the rail 27. Thecollector of the transistor Q₂₈ is connected to the terminal 37 andalso, by a resistor R₁₄₂ to the rail 26.

In normal running the sequence of operations is as follows:

The thyristor SCR1 is fired when the output of the current comparatoroperational amplifier A₅ goes low provided that the signal at terminal39 is high (i.e. There are currently no pulses being produced by timersT₃, T₅ and T₆) and the signal at terminal 40 is low (i.e. there is anadequate charge for commutation on the capacitor 19).

When the output of the amplifier A₅ goes high the timer T₁ is held reset(it will not still be producing its output pulse) via transistor Q₁₁turning on when transistor Q₆ turns on. Also, transistor Q₁₂ turns on,causing transistor Q₁₃ to turn on momentarily and triggering the timerT₂ provided that the signals at terminals 45, 46 and 47 are all low(i.e. provided none of timers T₅, T₆ or T₇ is producing a pulse). Thiscauses firing of the thyristor SCR2 to commutate the main thyristor SCR1current.

When the thyristor SCR2 ceases to conduct (indicating completion ofcommutation) the signal at the terminal 24 goes low, so that, providedthe signal at terminal 49 is high (which condition exists for 2.5 mSfollowing firing of the thyristor SCR2 because of timer T₃), the timerT₇ is triggered. At the end of the timer T₇ output pulse timer T₈ isfired (assuming that the signal at the terminal 24 has not meanwhilegone high) and the output of the timer T₈ turns on the transistor Q₂₆and thereby resets the timer T₃. Such resetting of the timer T₃ causestriggering of the timer T₄ which fires the thyristor SCR3. In the eventof the reset pulse at R₁ being "missed" for any reason, the timer T₃resets and triggers the timer T₄ after its full 2.5 mS delay.

Firing of the thyristor SCR3, causing triggering of the timer T₅ whichtriggers the timer T₆ after 300 μS, i.e. sufficient time for the voltageon the capacitor 19 to reverse and settle. During the 100 μS pulseduration of the timer, T₆, the f.e.t. Q₃ is conductive and the voltageon the capacitor 19 is sampled so that the signal at terminal 30 isadjusted to set the upper and lower current limits for the next cycle.Only when the signal at the terminal 47 goes low at the end of this 100μS does the signal at the terminal 37 go high again to allow the nextcycle to start.

Firing of thyristors SCR1 and SCR2 is prevented if the signal atterminal 31 goes low, but this can be overridden if required, for testpurposes.

In the creep mode contact 48 is closed and the thyristors SCR2 and SCR3are fired alternately whilst the signal at terminal 36 is high (i.e.,after the motor current falls below its lower limit) so that somecurrent can flow in the motor when the signal at terminal 36 goes lowsuch alternate firing ceases until the motor current falls again belowits lower limit.

I claim:
 1. An electric vehicle traction motor control circuitcomprising a main thyristor connected in series with the motor between apair of supply rails, a second thyristor connected in series with acommutating capacitor across said main thyristor, a third thyristorconnected in series with an inductor across the commutating capacitor,first firing means for firing the main thyristor when the motor currentis below a lower limit and for firing the second thyristor when themotor current exceeds an upper limit, means including a driver operablecontrol device for producing a current demand signal determinative ofsaid upper and lower limits, and second firing means for firing thethird thyristor to reverse the voltage on the commutating capacitorfollowing commutation, said first firing means including an oscillatorfor producing a pulse train for triggering a pulse generator to supplythyristor firing pulses to said main and second thyristors.
 2. Anelectric vehicle traction motor control circuit as claimed in claim 1,in which said first firing means includes a comparator which compares asignal corresponding to the actual motor current with said upper andlower limits, the output of the comparator being connected to the pulsegenerator and to a control terminal of the oscillator whereby the pulsegenerator may be triggered into producing a thyristor firing pulseeither by an edge of the output signal from the comparator or by an edgeof a pulse of the pulse train from the oscillator.
 3. An electricvehicle traction motor control circuit as claimed in claim 2 in whichthe pulse generator is connected edge-triggered and the oscillator isvoltage-sensitive.
 4. An electric vehicle traction motor control circuitas claimed in claim 3 in which the pulse generator has an inputtransistor to which the output of the comparator is capacitively coupledvia a buffer stage, the buffer stage also providing charging current fora capacitor forming part of the oscillator.
 5. An electric vehicletraction motor control circuit as claimed in claim 4 in which theoscillator includes a uni-junction transistor the emitter of which isconnected to the junction between said capacitor forming part of theoscillator and a resistor connected in series across the output of thebuffer stage, one base of the uni-junction transistor being connected tothe input stage of the pulse generator.
 6. An electric vehicle tractionmotor control circuit as claimed in claim 5 further comprising meansoperable by the output of the pulse generator for inhibiting theoscillator, and in which said inhibiting means includes a furtherthyristor connected to be triggered by the pulse generator output andconnected to maintain said capacitor of the oscillator in a dischargedcondition.
 7. An electric vehicle traction motor control circuit asclaimed in claim 6 further comprising a transistor connected across saidcapacitor and controlled by said further thyristor.